Katana Silicon Technologies v. Micron Technology — Federal Circuit Upholds IPR Invalidity of Semiconductor Stacking Patents

Background

Katana Silicon Technologies LLC owns two patents — U.S. Patent No. RE38,806 (a reissued patent) and U.S. Patent No. 6,352,879 — covering technology for stacking multiple semiconductor chips inside a miniaturized “Chip Size Package” (CSP). The key innovation is forming an adhesion layer directly on the back surface of a silicon wafer before the wafer is diced into individual chips, eliminating the overflow and positioning problems associated with older bonding methods.

In 2023, memory-chip giant Micron Technology filed three petitions for inter partes review (IPR) — a proceeding before the Patent Trial and Appeal Board (PTAB) that allows parties to challenge a granted patent’s validity using prior art. Micron argued that all challenged claims were obvious in view of an international patent application (WO 96/13066, referred to as “Mostafazadeh”), which also disclosed applying an adhesive layer to a wafer at the wafer stage before dicing. The PTAB agreed with Micron, holding claims 1-33 of the ‘806 patent and claims 1-15 of the ‘879 patent unpatentable as obvious.

The entire dispute on appeal turned on how to define just two words: “adhesion layer.” Katana argued it must mean “a pre-formed layer that is adhered” — a solid sheet that exists fully formed before bonding. Under that narrow reading, Mostafazadeh’s adhesive-then-cure process would not qualify, potentially saving the patents from invalidity. Micron defended the PTAB’s broader reading: “a layer that adheres” — any layer whose function is adhesion, regardless of whether it was pre-formed or cured in place.

The Court’s Holding

The Federal Circuit affirmed the PTAB’s decisions in all three IPR proceedings. Writing for a unanimous panel, Judge Stoll held that the plain meaning of “adhesion layer” is simply “a layer that adheres,” and that nothing in the claims, specification, or prosecution history limited it to a solid, pre-formed sheet.

The court applied a foundational principle of patent claim construction: courts may not import limitations from preferred embodiments into the claims absent clear lexicography (the patent expressly defining a term) or disavowal (the patent owner clearly giving up claim scope during prosecution). Both preferred embodiments described in the patents used thermo-compression sheets, but the court found those were merely illustrative examples, not a definition of what “adhesion layer” must always mean. Significantly, the specification itself used “adhesion layer” and “adhesive agent” interchangeably in at least one passage, undermining Katana’s argument that the two were fundamentally distinct concepts. Because the broad construction was adopted, the prior art reference Mostafazadeh disclosed the claimed “adhesion layer,” and the patents’ claims were properly found obvious.

Key Takeaways

• Preferred embodiments don’t limit claims: Unless a patent explicitly defines a term or clearly surrenders claim scope, courts will apply the plain, ordinary meaning — even if every disclosed embodiment is narrower than that meaning.
• IPR is an effective invalidity tool: Micron successfully wiped out 49 patent claims covering commercially significant semiconductor packaging technology, illustrating why large chip makers aggressively use IPR to invalidate patents asserted against them.
• Claim drafting matters: Had Katana drafted its claims to expressly require a “pre-formed” or “solid-sheet” adhesion layer, the outcome might have been different. Imprecise drafting enabled a broader construction that brought the prior art within the claims’ reach.
• Specification language is a double-edged sword: Using “adhesion layer” and “adhesive agent” interchangeably in the background section helped defeat Katana’s narrowing argument.

Why It Matters

Semiconductor packaging patents sit at the heart of the ongoing push for smaller, more powerful chips. Stacked chip architectures — like those covered by these patents — are used in memory modules, mobile processors, and AI accelerators. When a company like Micron successfully invalidates patents covering foundational packaging techniques via IPR, it removes the threat of costly infringement litigation and signals to the industry that even reissued patents are vulnerable when their claims are broad enough to read on well-known prior art.

For patent practitioners, this case is a reminder of the practical stakes of claim construction in IPR proceedings: the Board’s construction binds the obviousness analysis, so a narrow construction can be the difference between validity and invalidity. Companies prosecuting patents in competitive technology fields should draft claims with explicit limiting language when they intend a narrower scope — and avoid specification language that could blur the lines between broader and narrower concepts.